1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly, for example, to a DRAM (dynamic random access memory) having a trench capacitor, and its manufacturing method.
2. Description of the Related Art
In a DRAM or a embedded DRAM device (hereinafter simply referred to as a DRAM), a surface strap (SS) type contact is known as a connection between a storage node of a capacitor formed in a deep trench (DT) and source/drain diffusion layers of a cell array transistor.
FIGS. 33A and 33B are sectional views showing part of manufacturing processes of a conventional DRAM. FIG. 33B is a sectional view taken along the line XXXIIIB—XXXIIIB in FIG. 33A and perpendicular to FIG. 33A. As shown in FIGS. 33A and 33B, there are formed a storage node 101, a collar oxide film 102, an oxide film (trench top oxide: TTO) 103 on the storage node 101, an element separation insulating film 104, a gate electrode (word line) 105a, a passing word line 105b, and source/drain diffusion layers 106. An upper surface of the storage node 101 is located slightly lower than a surface of a semiconductor substrate 107. Together with source/drain diffusion layers (not shown) formed in a section which is different from that of FIG. 33A, the passing word line 105b constitutes the cell array transistor at the position of the above section.
Next, before forming the SS type contact, the TTO film 103 needs to be removed by etching or the like in order to expose the storage node 101. When the TTO film 103 is removed, the element separation insulating film 104 is etched at the same time to largely expose a sidewall of the semiconductor substrate 107 above the element separation insulating film 104 as shown in FIG. 33B. In this state, if an SS type contact 108 such as conductive polysilicon is formed, the contact 108 contacts the sidewall of the semiconductor substrate 107, and impurities from polysilicon are diffused via this contacting portion. Due to this diffusion, a junction position of the source/drain diffusion layers 106 of the cell array transistor changes and becomes deeper than a position which has previously been formed by ion injection. This changes characteristics of the cell array transistor. This problem will be more significant as design rules become more detailed.